Figure 2. Simulation of PWM with duty cycle 40 %.

Figure 2 explains how PWM signal is proportional to the analog. For the assumption, analog voltage is 4 volt, the maximum voltage is 10, so the PWM has 40% duty cycle.

Here is the simple code for generating pwm signal out the circuit as seen at Figure 1.

   $mod51
              org 00h
              jmp mulai

   mulai:
           mov r0, p0                ;r0 berisi data kondisi tinggi
           cjne r0, #100, kecil
   ulang:
           setb p1.0
           djnz r0, ulang
           jmp mulai
   kecil:
           mov a, #100
           subb a, r0
           mov r1, a                  ;r1 berisi data kondisi rendah
   on:
           setb p1.0
           djnz r0, on
   off:
          clr p1.0
          djnz r1, off
          jmp mulai
   end